Hackaday

FPGAs In C With Cynth

Programming an FPGA with Verilog looks a lot like programming. But it isn’t, at least not in the traditional sense. There have been several systems that aim to take C code and convert it into a ...
Hosted on MSN

Engineers create first AI model specialized for chip design language

Researchers at NYU Tandon School of Engineering have created VeriGen, the first specialized artificial intelligence model successfully trained to generate Verilog code, the programming language that ...
EDN

EDA startup offers graphical Verilog tool

SANTA CRUZ, Calif. — Aiming to simplify HDL code development and documentation, Orion Consulting Inc. (Austin, Texas) is rolling out Visual RTL, a tool that generates synthesizable Verilog code from ...
Electronics Weekly

Design tool converts Verilog descriptions into C

A Cambridge firm has developed a tool that converts a Verilog description of hardware into C. Tenison EDA said its VTOC tool will allow designers to make efficient C models of their hardware, speeding ...
Hackaday

Old Game Development IDE Goes FPGA

If you have a thing for old game development — things like the Atari 2600 or similar period arcade games — you might already know about the 8bitworkshop IDE. There you can develop code in your browser ...
Design-Reuse

Software engineering firm 'obfuscates' Verilog

SANTA CRUZ, Calif. — Not many software products are designed to make things more complicated, but an upcoming Verilog "source code obfuscator" from software engineering firm Semantic Designs does just ...
EDN

Latest version of Verilog approved as a standard

The next-generation version of the Verilog language has been approved as a standard by the Accellera organisationCalled SystemVerilog, the language blends Verilog, C/C++ and an assertion capability ...
Electronics Weekly

Cambridge tool converts Verilog description into C

A Cambridge firm has developed a tool that converts a Verilog description of hardware into C. Tenison EDA said its VTOC tool will allow designers to make efficient C models of their hardware, speeding ...