While ARM continues to make inroads into the personal computing market against traditional chip makers like Intel and AMD, it’s not a perfect architecture and does have some disadvantages. While it’s ...

We’ve been fans of the Yosys / Nextpnr open-source FPGA toolchain for a long while now, and like [Michael] we had no idea that their oss-cad-suite installer sets up everything so that you can write in ...

For the past several years, I have had the privilege to chair the IEEE 1076 VHDL working group. In March, we handed off the revisions to the VHDL LRM to our technical editor to finalize the document ...

Editor’s Note: In this series of articles based on his book – Design Recipes for FPGAs – Peter Wilson provides a basic quick overview of VHDL (VHSIC hardware description language) followed by ...

Last time, in the third installment of VHDL we discussed logic gates and Adders. Let’s move on to some basic VHDL structure. All HDL languages bridge what for many feels like a strange brew of ...

All designs need structure to make them easy to develop and maintain. We all use abstraction in our designs regardless of if it being electronics, software, or mechanical. In this article we will look ...

Aldec’s Active-HDL™ enables FPGA designers to take full advantage of the many features within the latest revision to VHDL and helps improve design verification efficiency. Henderson, NV – January 20, ...

Designers of electronic hardware describe the behavior and structure of system and circuit designs using hardware description languages (HDLs)—specialized programming languages commonly known as VHDL, ...

I can hear some of you asking the question already: “VHDL? That’s still around?” Essentially relegated to the status of Verilog roadkill in the HDL wars back in the 1980s, the VHSIC Hardware ...

This series of articles is designed to give concise and useful summary information on important language constructs and usage in VHDL – helpful and easy to use, but not necessarily complete. It will ...