EDN

Streamlining the SoC Design Flow

In SoC design, a streamlined verification and analysis flow can contribute significantly to the success of a product. With manufacturing yield and time-to-market schedules crucial, it is important to ...
EDN

ESL-based flow eases complex SoC design

Deep-submicron technologies have clearly had a big impact on capacity and what can be designed on a single system-on-chip (SoC). With increased functionality, however, comes increased complexity for ...
Semiconductor Engineering

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster

Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
Nasdaq

Synopsys and Samsung Foundry Announce Reference Flow for Predictable Execution of ASIL D-Compliant SoC Design for Automotive Applications

Samsung Foundry and Synopsys' optimized flow achieves predictable execution of in-system test, implementation, verification, timing and physical signoff for ASIL D-compliant SoC design Includes ...
Semiconductor Engineering

SOC Design & IP Management—A Must For Functional Verification

As a part of the verification flow, verification teams perform different types of simulations based on the nature of the design. The simulations include digital logic functional simulations, ...