Semiconductor Engineering

Power-Aware Revolution In Automated Test For ICs

As semiconductor devices advance in complexity and sensitivity to power fluctuations, the integration of power-aware automatic test pattern generation (ATPG) is becoming indispensable for yield and ...
Electronic Design

Using Timing Constraints For Generating At-Speed Test Patterns

Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...
Semiconductor Engineering

High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO Limited SoCs

This post addresses the specific hurdle of effective and efficient manufacturing tests for these complex devices. It outlines ...
Electronic Design

Simulation Mismatches Can Foul Up Test-Pattern Verification

Design for testability (DFT) works to make a circuit more testable to ensure that it was manufactured correctly. Alfred Crouch explains the purpose of DFT in his book, Design-For-Test for Digital ICs ...
Forbes

Ten Steps To Getting Started With Automated Software Testing

As the founder and CEO of an automated software testing company, I’ve been following the trends in this space closely, and it's exciting to see that the automation testing market is estimated to more ...