Sarcina Launches UCIe-A/S Packaging IP to Accelerate Chiplet Architectures

Sarcina launches UCIe-A/S Packaging IP, enabling high-performance, scalable chiplet interconnects with reduced ...
Semiconductor Engineering

Inter-Chiplet Interconnect Topologies On Organic And Glass Substrates

A new technical paper titled “FoldedHexaTorus: An Inter-Chiplet Interconnect Topology for Chiplet-based Systems using Organic and Glass Substrates” was published by researchers at ETH Zurich. “Chiplet ...
DIGITIMES

Intel unveils ultra-thin GaN chiplet as it advances AI-era systems foundry strategy

Intel Foundry has announced a breakthrough in gallium nitride (GaN) chiplet technology, unveiling what it describes as the ...
Digi Times

Substrate-based packaging for chiplet designs gaining popularity

Substrate-based packaging for chiplet designs is gaining favor among AI HPC customers, according to sources at OSATs. Some subscribers prefer to save their log-in information so they do not have to ...
Business Wire

d-Matrix Launches New Chiplet Connectivity Platform to Address Exploding Compute Demand for Generative AI

SANTA CLARA, Calif.--(BUSINESS WIRE)--Today, d-Matrix, a leader in high-efficiency AI-compute and inference processors, announced Jayhawk, the industry’s first Open Domain-Specific Architecture (ODSA) ...
EDN

Silicon 100: Chiplet work spanning interconnect PHYs to smart substrates

While the Silicon 100 report was being compiled and curated to profile the most promising startups in the semiconductor industry in 2025, two prominent chiplet upstarts were already taken. First, ...
Forbes

The Industry’s First System Chiplet For ADAS, Drones And AI Arrives

Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. The semiconductor industry has undergone a major ...