Design-Reuse

Magma and ChipX Extend Integrated RTL-to-GDSII Design Flow to Next-Generation Structured ASIC Designs

Magma Blast Create SA, Blast Fusion SA and ChipX CX6000 Structured ASIC combine to reduce cost and cycle time of high-performance designs SANTA CLARA, Calif., Nov. 9, 2005 - ChipX, the structured ASIC ...
EDN

Demonstrating ASIC IP performance and quality demands an FPGA-neutral design flow

Companies designing new system-on-chip (SoC) products are subject to ongoing market pressure to do more with less and achieve higher returns. The result is shrinking engineering teams, reduced design ...
EDN

An FPGA-to-ASIC case study for refining smart meter design

Many embedded system designs are first implemented using FPGAs. This may be for quicker prototyping or to provide a platform for software development. Sometimes, the FPGAs will remain in the design ...
Electronic Design

Making an ASIC—The Secret of Building a Good, Cheap Oscilloscope

Here at Keysight Oscilloscope HQ, we talk a lot about ASICs (application-specific integrated circuits). But why? Who cares about the internal architecture of a cheap oscilloscope? All that matters is ...